WashU
Introduction to Digital Logic and Computer Design
Spring 2025

Studio 2B


Overview

Studios are:

  • To be done in small groups of 2-3 people.
  • Group work is an important part of the studio experience.
  • You are not required to work with specific students and may adjust groups next week or as needed.
  • We expect you to be be respectful and professional in your interactions with your peers.
  • Credit is largely based on attendance and participation.
  • Studios do NOT need to be entirely completed for credit. Often studios contain more content than can be completed during class time. Submit the completed portion during time. It’s to your benefit to complete all of it, but additional out-of-class work does not impact the credit for the studio activity itself.

Studios are time to:

  1. Explore: They are meant to provide guided exploration of ideas and skills that are critical to the subject.
  2. Practice Technical Communication: Talking about technical concepts is critical to your major/minor (and probably your future career). Intentional discussions in studio times will help prepare you for interviews and technical meetings. More importantly, it can help correct or reenforce your thinking.
  3. Be Accountable for the Team: Part of the goal is to ensure everyone learns the material. Consider yourself responsible for both your understanding and that of those you are working with. (This is also a valuable skill — you are likely train and lead others in your career).

Studios are not:

  1. Study Hall: It is not time to work on other homework or courses or to catch up on socials/videos/etc.
  2. A Free Ride: You are expected to be engaged in the work and a part of ensuring that your group explores and understands the material.
  3. A Timed Contest: There’s no need to rush through the work or even complete it. If you finish unusually early and want to leave, you may be questioned by instructors or TAs to ensure that everyone in your group has a thorough understanding of the material. If there isn’t a clear sign of effort by each individual, credit may not be given for the studio.
  4. A Time to Read/Prep: You’ll be working with others. It is important that you be prepared and unfair to them if you are not.

Goals

The goals of this studio are to:

  • Practice making a (look up) table into a circuit via Sum-of-products approach
  • Practice making a table into a circuit via Karnaugh Maps
  • Get a better understanding of propagation delay and factors that influence propagation delay
  • Review use of Multiplexors as forms of look-up tables
  • Investigate concepts behind glitches
  • (Time permitting) look at real-world implementations of digital logic

Artifacts for this studio

Include an answer to questions in the numbered sections in your submission. Include the relevant section number for each answer, like 1.1.

Chapter 2: Gates

Tables

Given the following desired behavior:

Inputs Output
A B C Y
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

Canonical Form

Create the full, canonical (Sum-of-Products) equation for the output. (Note that inversion can be represented in text with the forward slash, as in /A)

Vs. Karnaugh Maps

Give the equation resulting from optimization via Karnaugh Maps (K-Maps).

Gates & Propagation Delay: Assumption 1

Assuming that AND and OR gates can be arbitrarily wide (handle mulitple bits) with no additional delay:

  1. Sketch the gate level representation of each of the previous parts
  2. What would be their relative performance (i.e., which is faster/slower and why do you think this?)?
  3. What is their actual propagation delay? You may assume that the propagation delays used in JLS are reasonably representative (5 units of time for invertors, and 10 units of time for both ANDs and ORs).

Propagation Delay: Assumption 2

Assuming instead that only true, binary ANDs and ORs can be done (i.e., 2 inputs). Multi-bit operations would have to be accomplished by multiple 2-input gates.

  1. Sketch the gate level representation of each of the previous parts
  2. What would be their relative performance (i.e., which is faster/slower and why do you think this?)?
  3. What is their actual propagation delay? You may assume that the propagation delays used in JLS are reasonably representative (5 units of time for invertors, and 10 units of time for both ANDs and ORs).

Simulation

Download this starter file: studio_2b_113.jls and create a simulation of the canonical equation via JLS. Simulate the behavior for all values shown in the truth table.

K Maps: More Practice

Give the K-Map minimization of this variation of the prior problem:

Inputs Output
E A B C Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

Multiplexers

As was discussed in class, multiplexers are well suited to picking between multiple values. Assume that you already have access to multi-input Multiplexers

Using 4-to-1 Multiplexers

Assume that you have a 4-to-1 multiplexer and want to leverage it to create the function shown in the table above (first table in previous problem). Using A and B as the selector inputs to the multiplexer, sketch and describe how you would create a circuit that determines the appropriate value of Y. You will need to use other parts, like constants or gates.

Using 8-to-1 Multiplexers

Assume that you have an 8-to-1 multiplexer and want to leverage it to create the function shown in the table above (again, first table in pervious problem). Using A, B, and C as the selector inputs to the multiplexer, sketch and describe how you would create a circuit that determines the appropriate value of Y.

Simulation

Download this starter file: studio_2b_23.jls and create a simulation of the 4-to-1 multiplexer imlpementation (from 2.1, not from 2.2) via JLS. Simulate the behavior for all values shown in the truth table. The JLS multiplexor’s selector will be a multi-bit value for any multiplexors with more than two inputs. You’ll need to use a bundler to bundle multiple 1-bit wires into a single, multi-bit wire of appropriate size for the multiplexor. You can create a budler by picking (bundler) from the parts menu. The resulting part will show the individual place-value locations being combined into the bundle. For example, bundling two inputs into a single, 2-bit value looks like:

bundling

The 0 input corresponds to the $2^0$ place in the multi-bit value and the 1 input corresponds to the $2^1$ place.

Getting Glitchy

The book describes a as:

… a single input transition can cause multiple output transitions.

(The term “hazard” usually applies to a situation in a circuit where a glitch could occur under the right circumstances. That is, if there’s a hazard, a glitch could occur when the circuit is operating)

Prior Glitches

Did you experience glitches in any of your prior work? If so, review and try to explain why the glitch occurred based on the inputs you used.

An Intentional Glitch

Glitches are a common occurrence in circuits. Where hazards exist (that is, there’s an opportunity for a glitch), one needs to ensure that outputs are not used until after sufficient time for all glitches to pass.

Intentionally constructing a circuit and inputs that will demonstrate a glitch can be useful to ensure you understand the causes of glitches.

Download this starter file: studio_2b_32.jls. It includes an input pin, an output pin, two NAND gates, and the Signal Generator is already configured.

Think about how to use the two NAND gates to create a configuration that will demonstrate a glitch with the given input signals:

  1. BEFORE you actually create and simulate the circuit, explain your reasoning behind your choices and why you think they will cause a glitch.
  2. THEN test your work and either confirm your thinking or, if it doesn’t confirm your work, try again and explain any errors in your initial reasoning.

Computation Time

Review your work and identify how much time is needed after in changes before the output is guaranteed to be settled (that is, until enough time has passed to be sure all glitches have passed). You can right-click on parts and select Change Timing to view their default timing if needed.

Discrete Components & Real Machines

Your lab kit will include several “7400 series” parts:

These parts were used extensively in Digital Logic from the 1960s-1980s. They were packaged in a plastic rectangle with wire “legs” that became a common symbol for electronics and digital logic, as shown on this tee shirt or here.

Real-World Values

Review the datasheet for the 7400 (link above) and consider its real-world properties:

  1. What is considered a 1 (high)?
  2. What is considered a 0?
  3. The part contains 4 NAND gates, but has a total 14 wires. What are the other two used for and why are they needed?
  4. Consider it’s physical size. If our computer needs 1000 NANDs, estimate how much space may it take up.

Nothing But NANDs

Assume that you have access to only 7400 chips.

  1. How can you implement other logic functions using only NANDs? Describe how to do both “inversion” and AND.
  2. Sketch how you could complete the circuit from part 1 (the table) using only the 7400 part. (How few 7400 parts would you need?) You can ignore the inputs and outputs for now. Show both the schematic of the logic using NAND gates and a rough sketch of how the 7400 parts need to be used.

Real-World Inputs

We will use switches and pull-ups resistors to avoid unpredictable floating inputs.

The switch, pull-up resistor, and gate are connected like:

Pull-up With Switch
Wikipedia

In our case:

  • Vin will be 5 volts
  • The resistor will be a 10k $\Omega$ (Ohm) Resistor

How many resistors and switches are needed for your inputs for the previous part?

Update your sketch from the previous part to include the switches and resistors needed for input.

Lights, …

Lab kits also come with several Light Emitting Diodes (Usually just called LEDs). As you may expect from the name, they “emit light”. We’ll be using LEDs to demonstrate the output value from logic. When the LED is on (emitting light) it will represent a 1 and no light will be a 0.

LEDs can burn out if too much current passes through them, so they are usually used in conjunction with a Current Limiting Resistor (an application of Ohm’s Law!).

Update your sketch to include use of an LED and resistor on the output (you can omit the specific value of the resistor, but usually 100-400 $\Omega$ is sufficient).

Challenge

Tinkercad is a free, friendly, on-line tool for various types of Computer Aided Design (CAD), including circuits. You can actually build and simulate the circuit you’ve sketched out using parts available in Tinkercad:

Submission / End-of-class

Discuss your work/findings with TAs/instructors. Submit a copy of the questions with everyone’s name at the top (at least one person should submit it, but it’s ok if everyone does).

Submission Link: Canvas